Field
This disclosure relates generally to packaged semiconductor devices, and more specifically, to interconnections between a package substrate and printed circuit board.
Related Art
In a semiconductor package that includes a typical ball grid array (BGA) device, the BGA device is connected to a printed circuit board (PCB) by a number of solder balls. Signal integrity through the solder balls between the BGA device and the PCB is often degraded due to parasitic capacitance from the bulk solder material, the solder ball shape, the large distance between a signal and ground return ball, and the direct adjacency of different signals leading to high crosstalk coupling between the signals. Additionally, only a finite number of solder balls, dependent on ball pitch and size, can fit within the body size of the semiconductor package, thereby limiting the number of pins available for signal lines, power lines, and ground lines. Body size is a significant cost factor for both the semiconductor package and the PCB to which the semiconductor package will ultimately be mounted.
The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements, unless otherwise noted. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.